The wraps are coming off IBM's Power7
Posted on: 08/26/2009 02:23 AM

IBM approaches the market with the next iteration of Power processors, series 7. The Power 7 processor features 8 cores with 4 SMT per core for up to 32 threads per processors. The chip also has Dual DDR3 memory controllers with bandwidth up to 100GB per chip. Level 3 cache now have a capacity of 32MB with eDRAM. With power consumption being a new scope of interest, IBM implemented ways through power-gating to give the processor the ability to shut off individual cores when not in use (ie; 6 cores could be shut off if idle while 2 remain active).

Check out the blurb here.




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